Involvement: I would like to offer my services in writing diagnostics for the Mill.
Diagnostics: Although Ivan mentioned test vectors automatically being generated to test the FPGA/silicon that is just a small subset of all possible failure and may not detect non compliance with the INTENDED design.
I consider that diagnostics written by a human with cunning and wild side ideas is better than fully relying on test vectors.
A human looking at the INTENDED design and with deep understanding of the hardware is likely to provide a better test coverage and early detection of inconsistencies in the tool set chain and physical implementation.
Diagnostics are both functional tests and stress tests and are run often with parts/system in an temperature chamber ranging from -40C to +125C or more. At lower temperatures the silicon is faster and often fails with logic timing hazards/tolerances not seen at room temperature. Similar for the higher temperature where the expected clock at 10GHz fails, but may manage to run error free at 8GHz.
I would not write diagnostics in C++ as the decomposition can be too vague for a carefully directed probe test.
About Me: I am still working as an embedded system designer: hardware, firmware, software. In my varied computer engineering career I often wrote CPU, memory and I/O diagnostics in assembler starting in the 1970 for the DG NOVA, PDP-11xx and at least 10 later CPU chips like the 68K. The later diagnostics code was done in C, thank goodness.