Mill Computing, Inc. Forums The Mill Implementation Wafer feature efficiency Reply To: Wafer feature efficiency

Ivan Godard
Post count: 689

Different efficiencies for different parts. vs. Haswell:
functional units: the same
caches: the double I$1 makes mill a bit bigger there, but same elsewhere for equal cache sizes;
belt/bypass: same for equal numbers of pipelines
decode: Mill much smaller for equal issue rate
read/write buffers: don’t exist on Mill.
rename and general registers: don’t exist on a Mill.
prediction: unclear because approach taken is so different; wild guess: equal area consumed, Mill advantage taken as better miss rate rather than reduced area
controller: equal for eqaual memory organization
coherence: Mill much smaller
spiller: does not exist on Haswell

Wild guess: for equal performance, process and clock a Mill core will be 4x smaller than Haswell, while the caches and controller will be the same size.