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There will be a presentation of the Mill CPU architecture at the annualĀ  “Awesome IT” Symposium in Amsterdam, Netherlands on April 10, 2015. Symposium location and other site information is at http://awesomeit.nl.


The talk will describe some aspects of the new Mill general-purpose CPU architecture that have not been previously disclosed. It is in two parts.

The first part will begin by reprising the Belt and Backless Memory, two previously described aspects of the Mill that are critical to understanding the new material. The talk will then present Spread Vectors and Skyline Vectors, the Mill’s way to compute with variable-length SIMD vectors. The Mill family member “Gold” will be the example: Gold supports all power-of-two vector sizes from 16 to 1024 bits, with all scalar element sizes from one through 16 bytes.

The second part of the talk will be devoted to the Mill’s hardware micro-threading. Spawning a thread, dispatching one for execution, idling it, killing it, and even such apparently unrelated facilities as setjmp/longjmp are all user-mode hardware operations on a Mill, with costs comparable to that of a normal function call. The talk will describe in detail how this works, with suggested uses from micro-kernel operating systems and parallel languages like Go.

The speaker and other members of the Mill team in Europe will be available for questions and discussion after the talk.