fmasw
From Mill Computing Wiki
speculable exu stream exu block compute phase operation in the signed integer value domain using widening overflow behavior that produces condition codes
native on: all
fused multiply-add or -add/subtract
fmasw(s op0, s op1, s op2) → s r0
operands: like Widening xx:2x
| Core | In Slots | [▸] Latencies |
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Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
