Glossary
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Abstract Code - general data flow code for the Mill architecture, distribution format
Abstract Assembly - general data flow code for the Mill architecture in human readable form, mainly used as compiler output
Backless Memory - allocating memory happens in cache initially and often no DRAM and system bus needs to be involved at all
Belt - provides the functionality of general purpose registers
Belt Position/Belt Location - the read only data source for machine operations
Block - a subsection of an instruction that contains a subset of the operations or data in a defined encoding format.
Bundle - a collection of instructions that get fetched from memory together
Concrete Code - specialized executable code for a specific Mill processor
Concrete Assembly - specialized executable code for a specific Mill processor in human readable form, mainly used for testing and in the debugger
Crossbar - the interconnecting framework that routes the data sources to the functional units
Decode - turning instruction stream bit patters into requests to functional units
Domains - operand value types, i.e. different interpretations of bit patterns by operations
EBB - extended basic block, a batch or sequence of instructions with one entry point and one or more exit points
Encoding – the semantic bit patterns representing operations
Event - an asynchronous diversion from normal program flow
Exit - a point where the instruction stream can leave the EBB
Exit Table - a hardware hash table containing exit point usage for EBBs, used to predict control flow
ExuCore - the collection of functional units and facilities serving operations from the exu instruction stream
Fault - an interrupt normal program flow cannot recover from in a meaningful way
First Winner Rule - only the first successful conditional branch operation in an instruction is taken
FlowCore - the collection of functional units and facilities serving operations from the flow instruction stream
FU, Functional Unit - the hardware module that provides the functionality to perform an operation
Ganging - combining more than two belt operands in more than one slot to perform a more complex operation
Implicit Zero - loads from new stack frames are implicitly zero
Interrupt - an event that has predefined but configurable handling code in the form of a function
Instruction - a collection of operations that get executed together
Instruction Stream - a sequence of instructions, the Mill has 2 working in parallel
Metadata - tags attached to belt slots that describe the data in it
Morsel - the amount of bits needed to address all belt locations on a core
None - undefined data in a slot that is silently ignored by operations
NaR - Not a Result, undefined data that traps when used in certain operations
Operation – the most basic semantically defined hardware unit of execution
Phase, Phasing - sequenced execution of different operations within one instruction
PLB - on chip cache for looking up protection regions for a virtual address
Pipeline - a logical and physical grouping of functional units sharing infrastructure for sequential step by step processing each cycle, emphasis on the physical aspect
Pipelining - arrangeing operations in the instruction stream in such a way as to maximize functional unit utilization
Portal - a gateway between different protection domains or turfs a thread can pass through
Prediction - deciding which branch to take in advance to prefetch the right code
PLB - Protection Lookaside Buffer
Portal - a cross turf call destination
Protection Region - specified continuous memory region with attached permissions
Retire Station - the piece of hardware that implements loads from memory, and where those loaded values end up
Region Table - the memory backing for the PLB
Replay - the way the hardware restores machine state after being interrupted
Scratchpad - Temporary buffer for operands from the belt
SAS - Single Address Space
Service - a stateful call interface that can cross protection barriers
Slot - a logical and physical grouping of functional units sharing infrastructure for sequential step by step processing each cycle, emphasis on the logical aspect
Specializer - turns general/abstract Mill code into concrete hardware specific machine instructions
Speculation - computing several paths in branches in parallel only to later throw away the unneeded results
Spiller - securely manages temporary memory used by certain operations in hardware
Stacklet - hardware managed memory line used in fragmented stacks
Stacklet Info Block - preserves stacklet state for a thread across portal calls
Thread - a contained and ID'd flow of execution
TLB - Translation Lookaside Buffer
Trap - an interrupt that afterwards is intended to resume normal program flow
Turf - memory protection domain on the Mill, a collection of regions
Virtual Zero - loads from all uninitialized memory yield zero
WKR, Well Known Region - protection regions not defined in the PLB but in registers, automatically managed by hardware
