store

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realizing  flow stream  flow block  writer phase   operation   in the logical value domain  

native on: all

Take a value from the belt and store it to the computed address.

Stores always write into the top level data cache, i.e. they are only reflected in main memory after travelling down the cache hierarchy, unless other behavior is requested with special attributes.

The addressing modes are the same as for loads. The general formula for computing addresses is base+offset+(scale*index).
Base can come from a number of special Registers or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt.

The width and scalarity of the value to store are determined from the metadata of the belt item that is getting stored. No need for any parameters or separate operations.

related operations: load, storef, stored


store(op base0, base op0, off off0)

operands: like Store px:


Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1

store(op op0, op op1, memAttr memAttr0)

operands: like Store px:


Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1

store(op op0, op op1, off off0)

operands: like Store px:


Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable