Difference between revisions of "Instruction Set/store"
| Line 10: | Line 10: | ||
The addressing modes are the same as for loads. The general formula for computing addresses is | The addressing modes are the same as for loads. The general formula for computing addresses is | ||
<code>base+offset+(scale*index)</code>.<br /> | <code>base+offset+(scale*index)</code>.<br /> | ||
| − | Base can come from a number of special [[ | + | Base can come from a number of special [[Registers]] or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.<br /> |
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt. | Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt. | ||
Revision as of 17:43, 4 February 2015
Take a value from the belt and store it to the computed address.
Stores always write into the top level data cache, i.e. they are only reflected in main memory after travelling down the cache hierarchy, unless other behavior is requested with special attributes.
The addressing modes are the same as for loads. The general formula for computing addresses is
base+offset+(scale*index).
Base can come from a number of special Registers or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt.
The width and scalarity of the value to store are determined from the metadata of the belt item that is getting stored. No need for any parameters or separate operations.
related operations: load, storef, stored
store(base b, off o, s i, scale s, op v)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 F1 | 1 |
| Silver | F0 F1 F2 F3 | 1 |
| Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 1 |
| Decimal8 | F0 F1 F2 F3 | 1 |
| Decimal16 | F0 F1 F2 F3 | 1 |
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 F1 | 1 |
| Silver | F0 F1 F2 F3 | 1 |
| Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 1 |
| Decimal8 | F0 F1 F2 F3 | 1 |
| Decimal16 | F0 F1 F2 F3 | 1 |
store(p b, off o, s i, scale s, op v)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 F1 | 1 |
| Silver | F0 F1 F2 F3 | 1 |
| Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 1 |
| Decimal8 | F0 F1 F2 F3 | 1 |
| Decimal16 | F0 F1 F2 F3 | 1 |
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 F1 | 1 |
| Silver | F0 F1 F2 F3 | 1 |
| Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 1 |
| Decimal8 | F0 F1 F2 F3 | 1 |
| Decimal16 | F0 F1 F2 F3 | 1 |
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 F1 | 1 |
| Silver | F0 F1 F2 F3 | 1 |
| Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 1 |
| Decimal8 | F0 F1 F2 F3 | 1 |
| Decimal16 | F0 F1 F2 F3 | 1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
