Difference between revisions of "Instruction Set/addfz"
From Mill Computing Wiki
m (Protected "Instruction Set/addfz": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |
(No difference) | |
Revision as of 01:36, 3 January 2015
realizing exu stream exu block compute phase operation in the binary floating point value domain that produces condition codes and rounds toward zero
Floating point add in current rounding towards zero.
operands: like Addf [ff:f]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 E1 | w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5 |
| Gold | E0 E1 E2 E3 | w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
