brfl
Branch on false predicate. There can be several conditionless branches in an EBB and even in the same operation, which are all processed in parallel, but the first successful in the lowest slot wins.
The targets in branches, whether literal or from a belt operand, are always relative to the EBB entry point. The optional delay serves to synchronize with operations that need to finish before control is transferred to the next EBB. This is particularly important for the predicates to examine for the branch, the value of which is examined after the delay.
The branch not taken case is more efficient and faster, i.e. the compiler takes care to schedule the conditional branches with their more likely case not to be taken, to achieve the longest possible code sequences without control transfers.
brfl(pred op0, op op1, ops args)
encoding:
brfl(pred count0, op op0, off op1, count off0)
,
brfl(pred count0, op op0, off op1, count lit0, lit off0)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 | 1 |
| Silver | F0 F1 F2 | 1 |
| Gold | F0 | 1 |
brfl(pred op0, lbl off0, ops args)
encoding:
brfl(pred count0, off op0, count off0)
,
brfl(pred count0, off op0, count lit0, lit off0)
,
brfl(pred count0, off op0, count lit0, lit lit1, lit off0)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 | 1 |
| Copper | F0 | 1 |
| Silver | F0 F1 F2 | 1 |
| Gold | F0 | 1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
