adduwv

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speculable  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   using widening overflow behavior   that produces condition codes

native on: all

Widening unsigned integer vector addition. If any of the result values in the vector overflows, the vector is widened as with widenuv.

adduwv(u x, u y) → u r0, u r1

operands: like Widenv XX:2X2X


Core In Slots Latencies
Tin E0 2 2
Copper E0 E1 2 2
Silver E0 E1 E2 E3 2 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2 2
Decimal8 E0 E1 E2 E3 2 2
Decimal16 E0 E1 E2 E3 2 2

adduwv(u x, imm y) → u r0, u r1

operands: like Widenv XX:2X2X


Core In Slots Latencies
Tin E0 2 2
Copper E0 E1 2 2
Silver E0 E1 E2 E3 2 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2 2
Decimal8 E0 E1 E2 E3 2 2
Decimal16 E0 E1 E2 E3 2 2


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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