u2fdz
From Mill Computing Wiki
realizing exu stream exu block compute phase operation in the decimal floating point value domain that produces condition codes and rounds toward zero
convert unsigned integer to float
operands: like Addd [dd:d]
Core | In Slots | Latencies |
---|---|---|
Decimal8 | E0 E1 | d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
Decimal16 | E0 E1 | d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable