rd

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realizing  exu stream  reader block  reader phase   operation   in the logical value domain  

native on: all

hardware reader

rd(const src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0

rd(scratch src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0

rd(reg src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0

rd(stream src)

operands: like NoArgs :[x]


Core In Slots Latencies
Tin R0 R1 0
Copper R0 R1 0
Silver R0 R1 R2 R3 R4 R5 0
Gold R0 R1 R2 R3 R4 R5 R6 R7 0
Decimal8 R0 R1 R2 R3 R4 R5 0
Decimal16 R0 R1 R2 R3 R4 R5 0


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