fmaffz

realizing  exu stream  exu block  compute phase   operation   in the binary floating point value domain  

native on: Silver Gold

fused multiply-add or -add/subtract

---

fmaffz(f x, f y, f z) → f r0

operands: like Addf [ff:f]

encoding: fmaffz(f x) , exuArgs(op arg0, op arg1)

Core	In Slots	Latencies
Silver	E0 E1	w,w:w=6 wv,wv:wv=6 d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8
Gold	E0 E1 E2 E3	w,w:w=6 wv,wv:wv=6 d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8

---

fmaffz(f x, f y, f z, f w) → f r0, f r1

operands: like Fmasf [ff:f]

encoding: fmaffz(f x, f y) , exuArgs(op arg0, op arg1)

Core	In Slots	Latencies
Silver	E0	w,w:w,w=6,6 wv,wv:wv,wv=6,6 d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8
Gold	E0 E2	w,w:w,w=6,6 wv,wv:wv,wv=6,6 d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8

Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable