br

From Mill Computing Wiki
Revision as of 14:10, 23 February 2021 by Generator (Talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
realizing  flow stream  flow block  transfer phase   operation  

native on: all

Conditionless branch. There must always be exactly one conditionless branch or return operation in every EBB, and always in last position. There can be several conditionless branches in an EBB and even in the same operation, which are all processes in parallel, but the first successful in the lowest slot wins.

The targets in branches, whether literal or from a belt operand, are always relative to the EBB entry point. The optional delay serves to synchronize with operations that need to finish before control is transferred to the next EBB.

related operations: brtr, brfl



br(op op0, ops args)

operands: like Inv :


encoding: br(op count0, off op0, count off0) , br(op count0, off op0, count lit0, lit off0) , br(op count0, off op0, count lit0, lit lit1, lit off0)

Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1

br(lbl off0, ops args)

operands: like Inv :


encoding: br(off count0, count off0) , br(off count0, count lit0, lit off0) , br(off count0, count lit0, lit lit1, lit off0) , br(off count0, count lit0, lit lit1, lit lit2, lit off0)

Core In Slots Latencies
Tin F0 1
Copper F0 1
Silver F0 F1 F2 1
Gold F0 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable