f2udsz

From Mill Computing Wiki
Revision as of 01:31, 3 January 2015 by Generator (Talk | contribs)

Jump to: navigation, search
realizing  exu stream  exu block  compute phase   operation   in the decimal floating point value domain   using saturating overflow behavior   that produces condition codes and rounds toward zero

native on: Decimal8 Decimal16

Inexactly convert a decimal floating point value to a unsigned integer, rounding toward zero and producing saturating result values.


f2udsz(d x) → d r0

operands: like Addd [dd:d]


Core In Slots Latencies
Decimal8 E0 E1 d:d=4 dv:dv=4 q:q=5 qv:qv=5
Decimal16 E0 E1 d:d=4 dv:dv=4 q:q=5 qv:qv=5


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable