Difference between revisions of "Instruction Set/integerfn"
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Revision as of 06:58, 2 October 2014
realizing exu stream exu block compute phase operation in the binary floating point value domain that produces condition codes
round to integral-valued float
operands: like Addf [ff:f]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 E1 | w:w=3 wv:wv=3 d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
| Gold | E0 E1 E2 E3 | w:w=3 wv:wv=3 d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
