Difference between revisions of "Instruction Set/adduw2"

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Revision as of 14:02, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   using widening overflow behavior   that produces condition codes

native on: all

addition


adduw2(u op0, u op1) → u r0, u r1

operands: like Wideningv XX:2X2X


Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1 E2 E3
Gold E0

adduw2(u op0, imm imm0) → u r0, u r1

operands: like Wideningv XX:2X2X


Core In Slots Latencies
Tin E0
Copper E0
Silver E0 E1 E2 E3
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable