Difference between revisions of "Instruction Set/left"

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Line 17:Line 17:
 
| [[Cores/Tin/Encoding#left|Tin]] || E0 || 1
 
| [[Cores/Tin/Encoding#left|Tin]] || E0 || 1
 
|-
 
|-
−
| [[Cores/Copper/Encoding#left|Copper]] || E0 E1 || 1
+
| [[Cores/Copper/Encoding#left|Copper]] || E0 || 1
 
|-
 
|-
 
| [[Cores/Silver/Encoding#left|Silver]] || E0 E1 E2 E3 || 1
 
| [[Cores/Silver/Encoding#left|Silver]] || E0 E1 E2 E3 || 1
 
|-
 
|-
−
| [[Cores/Gold/Encoding#left|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 1
+
| [[Cores/Gold/Encoding#left|Gold]] || E0 || 1
−
|-
+
−
| [[Cores/Decimal8/Encoding#left|Decimal8]] || E0 E1 E2 E3 || 1
+
−
|-
+
−
| [[Cores/Decimal16/Encoding#left|Decimal16]] || E0 E1 E2 E3 || 1
+
 
|}
 
|}
  
 
----
 
----
−
<code style="font-size:130%"><b style="color:#050">left</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">x</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and scalarity (exu)">w</span></i>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
+
<code style="font-size:130%"><b style="color:#050">left</b>(<span style="color:#009">[[Domains#op|op]]</span> <span title="belt operand from ops window">x</span>, <i><span style="color:#009">[[Immediates#width|width]]</span> <span title="data width and vector length (exu)">w</span></i>) &#8594; [[Domains#op|op]] r<sub>0</sub></code>
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeLefts|like Lefts xx:X]]
 
<div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeLefts|like Lefts xx:X]]
 
</div>
 
</div>
Line 37:Line 33:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
−
| [[Cores/Tin/Encoding#left|Tin]] || E0 || 1
+
| [[Cores/Tin/Encoding#left|Tin]] || E0 ||  
−
|-
+
−
| [[Cores/Copper/Encoding#left|Copper]] || E0 E1 || 1
+
−
|-
+
−
| [[Cores/Silver/Encoding#left|Silver]] || E0 E1 E2 E3 || 1
+
 
|-
 
|-
−
| [[Cores/Gold/Encoding#left|Gold]] || E0 E1 E2 E3 E4 E5 E6 E7 || 1
+
| [[Cores/Copper/Encoding#left|Copper]] || E0 ||  
 
|-
 
|-
−
| [[Cores/Decimal8/Encoding#left|Decimal8]] || E0 E1 E2 E3 || 1
+
| [[Cores/Silver/Encoding#left|Silver]] || E0 E1 E2 E3 ||  
 
|-
 
|-
−
| [[Cores/Decimal16/Encoding#left|Decimal16]] || E0 E1 E2 E3 || 1
+
| [[Cores/Gold/Encoding#left|Gold]] || E0 ||  
 
|}
 
|}
  
  
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]
 
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Latest revision as of 14:00, 23 February 2021

speculable  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

Count leading false in or construct bool vector with leading false.

left(op v) → op r0

operands: like Leftv XX:i

This counts the leading false elements in a bool vector.

Core In Slots [▸]  Latencies
Tin E0 1
Copper E0 1
Silver E0 E1 E2 E3 1
Gold E0 1

left(op x, width w) → op r0

operands: like Lefts xx:X

Constructs a bool vector with w elements of which the leading x elements are false and the rest true.

Core In Slots [▸]  Latencies
Tin E0
Copper E0
Silver E0 E1 E2 E3
Gold E0


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable

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