Difference between revisions of "Instruction Set/widensf"

From Mill Computing Wiki
Jump to: navigation, search
Line 1:Line 1:
 
{{DISPLAYTITLE:widensf}}
 
{{DISPLAYTITLE:widensf}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed fixed point value domain]]&nbsp;&nbsp;<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the signed fixed point value domain]]&nbsp;&nbsp;<br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />
 
</div>
 
</div>

Revision as of 09:31, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the signed fixed point value domain  

native on: all

Double the scalar width of a signed fixed point value.

The reason a special widen for fixed point is needed is because the fixed point is defined relative to the most significant side. Widening increases precision, but doesn't extend the value range.

The natively available byte widths on all Cores are 1, 2, 4, 8, and on the high end also 16.


widensf(sf v) → sf r0

operands: like Widen xx:2x


Core In Slots Latencies
Tin E0 b:h=1 h:w=1 w:d=1 d:q=2
Copper E0 E1 b:h=1 h:w=1 w:d=1 d:q=2
Silver E0 E1 E2 E3 b:h=1 h:w=1 w:d=1 d:q=2
Gold E0 E1 E2 E3 E4 E5 E6 E7 b:h=1 h:w=1 w:d=1 d:q=2
Decimal8 E0 E1 E2 E3 b:h=1 h:w=1 w:d=1 d:q=2
Decimal16 E0 E1 E2 E3 b:h=1 h:w=1 w:d=1 d:q=2


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable