Difference between revisions of "Instruction Set/fmade"

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m (Protected "Instruction Set/fmade": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite)))
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{{DISPLAYTITLE:fmade}}
 
{{DISPLAYTITLE:fmade}}
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Rounding|and rounds to nearest, ties toward even adjacent value]]<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the decimal floating point value domain]]&nbsp;&nbsp; [[Rounding|and rounds to nearest, ties toward even adjacent value]]<br />
 
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
 
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br />
 
</div>
 
</div>

Revision as of 09:31, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the decimal floating point value domain   and rounds to nearest, ties toward even adjacent value

native on: Decimal8 Decimal16

Decimal floating point fused multiply-add. As usual for those, it yields a higher precision than doing it separately, and is faster too. Rounds towards even.

fmade(d x, d y, d z) → d r0

operands: like Addd [dd:d]

Returns x*y+z on the belt.

encoding: fmade(d x) , exuArgs(op arg0, op arg1)

Core In Slots Latencies
Decimal8 E0 E1 d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8
Decimal16 E0 E1 d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8

fmade(d x, d y, d z, d w) → d r0, d r1

operands: like Fmasd [dd:d]

This is a fused multiply-add-subtract. An excellent way to make full use of all Functional Units in the 2 Slots.
r0 is x*y+z*w
r1 is x*y-z*w

encoding: fmade(d x, d y) , exuArgs(op arg0, op arg1)

Core In Slots Latencies
Decimal8 E0 d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8
Decimal16 E0 d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8


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