Difference between revisions of "Instruction Set/divRemu"

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{{DISPLAYTITLE:divRemu}}
 
{{DISPLAYTITLE:divRemu}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
 
'''native on:''' [[Assembly|none]]<br />
 
'''native on:''' [[Assembly|none]]<br />
 
</div>
 
</div>

Revision as of 09:28, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   that produces condition codes

native on: none

Unsigned integer division for quotient and remainder.

related operations: divu, remu, rdivu, rootu, rrootu


divRemu(u x, u y) → u r0, u r1

operands: like DivRem [xx:xx]



divRemu(u x, imm y) → u r0, u r1

operands: like DivRem [xx:xx]



Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable