Difference between revisions of "Instruction Set/con"
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m (Protected "Instruction Set/con": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |||
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{{DISPLAYTITLE:con}} | {{DISPLAYTITLE:con}} | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation| | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]] [[Encoding|flow stream]] [[Decode|flow block]] [[Phasing|reader phase]] operation <br /> |
'''native on:''' [[Cores|all]]<br /> | '''native on:''' [[Cores|all]]<br /> | ||
</div> | </div> |
Revision as of 09:26, 9 February 2015
Drop an immediate constant on the belt.
The con operation retires in the reader phase despite it using the extension and manifest encoding blocks for the value. This is possible because these bitpatterns are not interpreted at all but directly placed into the belt. Only scalar values are possible, and the width is determined from the head.
related operations: rd
operands: like IdentityNoSIMD xx:x
encoding:
con(off v, width w)
,
con(off v, width w, lit v)
,
con(off v, width w, lit v, lit v)
,
con(off v, width w, lit v, lit v, lit v)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 F1 | 0 |
Copper | F0 F1 | 0 |
Silver | F0 F1 F2 F3 | 0 |
Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 0 |
Decimal8 | F0 F1 F2 F3 | 0 |
Decimal16 | F0 F1 F2 F3 | 0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable