Difference between revisions of "Infrastructure"
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| − | The Mill is a whole processor family. Since it is impossible to make one processor that covers all applications and use cases, a whole range of different cores and chips can be defined | + | The Mill is a whole processor family. Since it is impossible to make one processor that covers all applications and use cases, a whole range of different cores and chips can be defined that all are still fully inter-operable/compatible at the software level and the same applications and programs can be installed and work across the whole family without change. |
To facilitate this, not only the normal Mill processor production usage, also the whole design process makes extensive use of a big software stack that is automatically generated to a large extent. From a C++ [[Specification]] file of a Mill core, the in house [[Synthesis]] software generates not only a [http://en.wikipedia.org/wiki/Verilog Verilog] specification, but also a software processor [[Simulator]], a [[Debugger]] and crucially also a [[Specializer]] for this processor. | To facilitate this, not only the normal Mill processor production usage, also the whole design process makes extensive use of a big software stack that is automatically generated to a large extent. From a C++ [[Specification]] file of a Mill core, the in house [[Synthesis]] software generates not only a [http://en.wikipedia.org/wiki/Verilog Verilog] specification, but also a software processor [[Simulator]], a [[Debugger]] and crucially also a [[Specializer]] for this processor. | ||
Other important parts of the software stack are an [http://llvm.org llvm] compiler back end (still in development). | Other important parts of the software stack are an [http://llvm.org llvm] compiler back end (still in development). | ||
Latest revision as of 07:16, 12 January 2015
The Mill is a whole processor family. Since it is impossible to make one processor that covers all applications and use cases, a whole range of different cores and chips can be defined that all are still fully inter-operable/compatible at the software level and the same applications and programs can be installed and work across the whole family without change.
To facilitate this, not only the normal Mill processor production usage, also the whole design process makes extensive use of a big software stack that is automatically generated to a large extent. From a C++ Specification file of a Mill core, the in house Synthesis software generates not only a Verilog specification, but also a software processor Simulator, a Debugger and crucially also a Specializer for this processor.
Other important parts of the software stack are an llvm compiler back end (still in development).
