Difference between revisions of "Instruction Set/subsx"
From Mill Computing Wiki
m (Protected "Instruction Set/subsx": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |||
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| − | subtraction | + | Excepting signed integer subtraction. |
| + | Overflow or underflow produces a [[NaR]]. | ||
| + | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">subsx</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#s|s]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">subsx</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#s|s]] r<sub>0</sub></code> | ||
Revision as of 10:40, 11 January 2015
realizing exu stream exu block compute phase operation in the signed integer value domain using excepting overflow behavior that produces condition codes
aliases: subsxv
native on: all
Excepting signed integer subtraction. Overflow or underflow produces a NaR.
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | 2 |
| Copper | E0 E1 | 2 |
| Silver | E0 E1 E2 E3 | 2 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 2 |
| Decimal8 | E0 E1 E2 E3 | 2 |
| Decimal16 | E0 E1 E2 E3 | 2 |
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | 2 |
| Copper | E0 E1 | 2 |
| Silver | E0 E1 E2 E3 | 2 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 2 |
| Decimal8 | E0 E1 E2 E3 | 2 |
| Decimal16 | E0 E1 E2 E3 | 2 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
