Difference between revisions of "Instruction Set/neq"
From Mill Computing Wiki
m (Protected "Instruction Set/neq": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |
(No difference) | |
Revision as of 01:34, 3 January 2015
realizing exu stream exu block compute phase operation in the logical value domain
aliases: neqs nequ
native on: all
Integer inequality comparison. All comparison operations produce 0 or 1 values of the operand width.
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | 1 |
| Copper | E0 E1 | 1 |
| Silver | E0 E1 E2 E3 | 1 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 1 |
| Decimal8 | E0 E1 E2 E3 | 1 |
| Decimal16 | E0 E1 E2 E3 | 1 |
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | 1 |
| Copper | E0 E1 | 1 |
| Silver | E0 E1 E2 E3 | 1 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | 1 |
| Decimal8 | E0 E1 E2 E3 | 1 |
| Decimal16 | E0 E1 E2 E3 | 1 |
neq(conditioncode) → op r0
operands: like Identity [xx:x]
Gets the inequality condition code of the ganged operation and puts it on the belt.
related operations: eql, gtr, geq, lss, leq, carry, overflow, fault
alternate encoding: skinny
| Core | In Slots | Latencies |
|---|---|---|
| Tin | e0 E0 E1 | 1 |
| Copper | e0 E0 E1 | 1 |
| Silver | e0 E0 E1 E2 E3 | 1 |
| Gold | e0 E0 E1 E2 E3 E4 E5 E6 E7 | 1 |
| Decimal8 | e0 E0 E1 E2 E3 | 1 |
| Decimal16 | e0 E0 E1 E2 E3 | 1 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
