Difference between revisions of "Instruction Set/fmadz"
From Mill Computing Wiki
m (Protected "Instruction Set/fmadz": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |
(No difference) |
Revision as of 01:33, 3 January 2015
realizing exu stream exu block compute phase operation in the decimal floating point value domain and rounds toward zero
Decimal floating point fused multiply-add. As usual for those, it yields a higher precision than doing it separately, and is faster too. Rounds towards zero.
operands: like Addd [dd:d]
Returns x*y+z on the belt.
encoding:
fmadz(d x)
,
exuArgs(op arg0, op arg1)
Core | In Slots | Latencies |
---|---|---|
Decimal8 | E0 E1 | d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8 |
Decimal16 | E0 E1 | d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8 |
fmadz(d x, d y, d z, d w) → d r0, d r1
operands: like Fmasd [dd:d]
This is a fused multiply-add-subtract. An excellent way to make full use of all Functional Units in the 2 Slots.
r0 is x*y+z*w
r1 is x*y-z*w
encoding:
fmadz(d x, d y)
,
exuArgs(op arg0, op arg1)
Core | In Slots | Latencies |
---|---|---|
Decimal8 | E0 | d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8 |
Decimal16 | E0 | d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable