Difference between revisions of "Instruction Set/f2seffz"

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Revision as of 01:28, 3 January 2015

realizing  exu stream  exu block  compute phase   operation   in the binary floating point value domain   using modulo overflow behavior   that produces condition codes and rounds to nearest, ties away from zero

native on: Silver Gold

Exactly convert a binary floating point value to a signed integer, rounding away from zero and normal modulo overflow.


f2seffz(f x) → f r0

operands: like Addf [ff:f]


Core In Slots Latencies
Silver E0 E1 w:w=3 wv:wv=3 d:d=4 dv:dv=4 q:q=5 qv:qv=5
Gold E0 E1 E2 E3 w:w=3 wv:wv=3 d:d=4 dv:dv=4 q:q=5 qv:qv=5


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable