Difference between revisions of "Cores/Copper"
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<b>[[Cores]]:</b> [[Cores/Tin|Tin]] [[Cores/Copper|Copper]] [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] | <b>[[Cores]]:</b> [[Cores/Tin|Tin]] [[Cores/Copper|Copper]] [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] | ||
| − | The Copper core isn't | + | The Copper core isn't muh bigger than Tin, but here both flow and exu slots are properly populated with functional units, so instruction level parallelism is approximately doubled in comparison. Mobile devices, low power servers or smart devices like printers are the expected primary targets. |
Revision as of 10:18, 30 December 2014
Cores: Tin Copper Silver Gold Decimal8 Decimal16
The Copper core isn't muh bigger than Tin, but here both flow and exu slots are properly populated with functional units, so instruction level parallelism is approximately doubled in comparison. Mobile devices, low power servers or smart devices like printers are the expected primary targets.
Belt: 8 Morsel: 3bit Scalar Width: 64bit Operand Maximum Size: 8B
Pipelines: 13 Retire Stations: 8 Scratchpad: 128B
Spill Buffers: 8 Spiller Stack Size: 16MB
iCache Line: 16B
2 reader slots, 9bits wide 2 writer slots, 6bits wide 1 pick slots, 10bits wide
exu slot 0, 18bits wide, with functional units: alu count mul nope shift shuffle
exu slot 1, 16bits wide, with functional units: alu exuArgs
flow slot 0, 15bits wide, with functional units: cache con conform control ls misc nopf
flow slot 1, 15bits wide, with functional units: con conform control flowArgs ls
