Difference between revisions of "Instruction Set/leqs"
From Mill Computing Wiki
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| − | + | Signed integer lesser than or equal comparison. | |
| + | All comparison operation produce 0 or 1 values of the operand width. | ||
| + | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">leqs</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#s|s]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">leqs</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#s|s]] r<sub>0</sub></code> | ||
Revision as of 18:53, 20 December 2014
realizing exu stream exu block compute phase operation in the signed integer value domain
aliases: geqs
native on: all
Signed integer lesser than or equal comparison. All comparison operation produce 0 or 1 values of the operand width.
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Copper | E0 E1 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Silver | E0 E1 E2 E3 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Decimal8 | E0 E1 E2 E3 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Decimal16 | E0 E1 E2 E3 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
operands: like Identity [xx:x]
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Copper | E0 E1 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Silver | E0 E1 E2 E3 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Gold | E0 E1 E2 E3 E4 E5 E6 E7 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Decimal8 | E0 E1 E2 E3 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
| Decimal16 | E0 E1 E2 E3 | b,b:b=1 bv,bv:bv=1 h,h:h=1 hv,hv:hv=1 w,w:w=1 wv,wv:wv=1 d,d:d=2 dv,dv:dv=2 q,q:q=2 qv,qv:qv=2 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
