Difference between revisions of "Instruction Set/nope"

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(Created page with "{{DISPLAYTITLE:nope}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  exu stream  exu block...")
 
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Tin/Encoding#694|Tin]] || e0 E0 || 1
+
| [[Cores/Tin/Encoding#nope|Tin]] || e0 E0 || 1
 
|-
 
|-
| [[Cores/Copper/Encoding#694|Copper]] || e0 E0 || 1
+
| [[Cores/Copper/Encoding#nope|Copper]] || e0 E0 || 1
 
|-
 
|-
| [[Cores/Silver/Encoding#694|Silver]] || e0 E0 || 1
+
| [[Cores/Silver/Encoding#nope|Silver]] || e0 E0 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#694|Gold]] || E0 E1 || 1
+
| [[Cores/Gold/Encoding#nope|Gold]] || E0 E1 || 1
 
|-
 
|-
| [[Cores/Decimal8/Encoding#694|Decimal8]] || e0 E0 || 1
+
| [[Cores/Decimal8/Encoding#nope|Decimal8]] || e0 E0 || 1
 
|-
 
|-
| [[Cores/Decimal16/Encoding#694|Decimal16]] || e0 E0 || 1
+
| [[Cores/Decimal16/Encoding#nope|Decimal16]] || e0 E0 || 1
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Revision as of 02:38, 16 December 2014

realizing  exu stream  exu block  compute phase   operation   in the logical value domain  

native on: all

no-operation


nope()

operands: like NoArgs :[x]


alternate encoding: skinny

Core In Slots Latencies
Tin e0 E0 1
Copper e0 E0 1
Silver e0 E0 1
Gold E0 E1 1
Decimal8 e0 E0 1
Decimal16 e0 E0 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable