Difference between revisions of "Instruction Set/mulf"
From Mill Computing Wiki
(Created page with "{{DISPLAYTITLE:mulf}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing exu stream exu block...") | |||
| Line 4: | Line 4: | ||
</div> | </div> | ||
| − | + | Floating point multplication in current rounding mode. | |
| + | |||
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">mulf</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#f|f]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">mulf</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#f|f]] r<sub>0</sub></code> | ||
Revision as of 10:18, 12 November 2014
realizing exu stream exu block compute phase operation in the binary floating point value domain that produces condition codes
Floating point multplication in current rounding mode.
operands: like Addf [ff:f]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 E1 | w,w:w=4 wv,wv:wv=4 d,d:d=5 dv,dv:dv=5 q,q:q=6 qv,qv:qv=6 |
| Gold | E0 E1 E2 E3 | w,w:w=4 wv,wv:wv=4 d,d:d=5 dv,dv:dv=5 q,q:q=6 qv,qv:qv=6 |
