Difference between revisions of "Instruction Set/divffz"
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− | + | Floating point division in current rounding away from zero. | |
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<code style="font-size:130%"><b style="color:#050">divffz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#f|f]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">divffz</b>(<span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#f|f]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#f|f]] r<sub>0</sub></code> |
Revision as of 10:19, 12 November 2014
realizing exu stream exu block compute phase operation in the binary floating point value domain that produces condition codes
native on: none
Floating point division in current rounding away from zero.
operands: like Addf [ff:f]