Difference between revisions of "Instruction Set/fmadz"
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(Created page with "{{DISPLAYTITLE:fmadz}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing exu stream [[Decode|exu block]...") | |||
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
− | | [[Cores/Decimal8/Encoding# | + | | [[Cores/Decimal8/Encoding#fmadz|Decimal8]] || E0 E1 || d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8 |
|- | |- | ||
− | | [[Cores/Decimal16/Encoding# | + | | [[Cores/Decimal16/Encoding#fmadz|Decimal16]] || E0 E1 || d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8 |
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
− | | [[Cores/Decimal8/Encoding# | + | | [[Cores/Decimal8/Encoding#fmadz|Decimal8]] || E0 || d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8 |
|- | |- | ||
− | | [[Cores/Decimal16/Encoding# | + | | [[Cores/Decimal16/Encoding#fmadz|Decimal16]] || E0 || d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8 |
|} | |} | ||
+ | |||
+ | |||
+ | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Revision as of 02:38, 16 December 2014
fused multiply-add or -add/subtract
operands: like Addd [dd:d]
encoding:
fmadz(d x)
,
exuArgs(op arg0, op arg1)
Core | In Slots | Latencies |
---|---|---|
Decimal8 | E0 E1 | d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8 |
Decimal16 | E0 E1 | d,d:d=7 dv,dv:dv=7 q,q:q=8 qv,qv:qv=8 |
fmadz(d x, d y, d z, d w) → d r0, d r1
operands: like Fmasd [dd:d]
encoding:
fmadz(d x, d y)
,
exuArgs(op arg0, op arg1)
Core | In Slots | Latencies |
---|---|---|
Decimal8 | E0 | d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8 |
Decimal16 | E0 | d,d:d,d=7,7 dv,dv:dv,dv=7,7 q,q:q,q=8,8 qv,qv:qv,qv=8,8 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable