Difference between revisions of "Instruction Set/fill"

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(Created page with "{{DISPLAYTITLE:fill}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  flow stream Decode|flow block...")
 
Line 14:Line 14:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Tin/Encoding#445|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#fill|Tin]] || F0 || 1
 
|-
 
|-
| [[Cores/Copper/Encoding#445|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#fill|Copper]] || F0 F1 || 1
 
|-
 
|-
| [[Cores/Silver/Encoding#445|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#fill|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#445|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#fill|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|-
 
|-
| [[Cores/Decimal8/Encoding#445|Decimal8]] || F0 F1 F2 F3 || 1
+
| [[Cores/Decimal8/Encoding#fill|Decimal8]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Decimal16/Encoding#445|Decimal16]] || F0 F1 F2 F3 || 1
+
| [[Cores/Decimal16/Encoding#fill|Decimal16]] || F0 F1 F2 F3 || 1
 
|}
 
|}
  
Line 36:Line 36:
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Tin/Encoding#444|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#fill|Tin]] || F0 || 1
 
|-
 
|-
| [[Cores/Copper/Encoding#444|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#fill|Copper]] || F0 F1 || 1
 
|-
 
|-
| [[Cores/Silver/Encoding#444|Silver]] || F0 F1 F2 F3 || 1
+
| [[Cores/Silver/Encoding#fill|Silver]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#444|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
+
| [[Cores/Gold/Encoding#fill|Gold]] || F0 F1 F2 F3 F4 F5 F6 F7 || 1
 
|-
 
|-
| [[Cores/Decimal8/Encoding#444|Decimal8]] || F0 F1 F2 F3 || 1
+
| [[Cores/Decimal8/Encoding#fill|Decimal8]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Decimal16/Encoding#444|Decimal16]] || F0 F1 F2 F3 || 1
+
| [[Cores/Decimal16/Encoding#fill|Decimal16]] || F0 F1 F2 F3 || 1
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Revision as of 02:37, 16 December 2014

realizing  flow stream  flow block  compute phase   operation  

native on: all

retore spilled operand from extended scratchpad


fill(off off0) → op r0

operands: like IdentityNoSIMD xx:x


Core In Slots Latencies
Tin F0 1
Copper F0 F1 1
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1
Decimal8 F0 F1 F2 F3 1
Decimal16 F0 F1 F2 F3 1

fill(off lit0, lit off0) → op r0

operands: like IdentityNoSIMD xx:x


Core In Slots Latencies
Tin F0 1
Copper F0 F1 1
Silver F0 F1 F2 F3 1
Gold F0 F1 F2 F3 F4 F5 F6 F7 1
Decimal8 F0 F1 F2 F3 1
Decimal16 F0 F1 F2 F3 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable