Difference between revisions of "Instruction Set/fmasw"
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Latest revision as of 13:56, 23 February 2021
speculable exu stream exu block compute phase operation in the signed integer value domain using widening overflow behavior that produces condition codes
native on: all
fused multiply-add or -add/subtract
fmasw(s op0, s op1, s op2) → s r0
operands: like Widening xx:2x
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | |
| Copper | E0 | |
| Silver | E0 E1 E2 E3 | |
| Gold | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
