Difference between revisions of "Instruction Set/flowArgs"
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(Created page with "{{DISPLAYTITLE:flowArgs}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing flow stream Decode|flow b...") | |||
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
| − | | [[Cores/Tin/Encoding# | + | | [[Cores/Tin/Encoding#flowArgs|Tin]] || F1 || 0 |
|- | |- | ||
| − | | [[Cores/Copper/Encoding# | + | | [[Cores/Copper/Encoding#flowArgs|Copper]] || F1 || 0 |
|- | |- | ||
| − | | [[Cores/Silver/Encoding# | + | | [[Cores/Silver/Encoding#flowArgs|Silver]] || F1 F2 F3 || 0 |
|- | |- | ||
| − | | [[Cores/Gold/Encoding# | + | | [[Cores/Gold/Encoding#flowArgs|Gold]] || F1 F2 F3 F4 F5 F6 F7 || 0 |
|- | |- | ||
| − | | [[Cores/Decimal8/Encoding# | + | | [[Cores/Decimal8/Encoding#flowArgs|Decimal8]] || F1 F2 F3 || 0 |
|- | |- | ||
| − | | [[Cores/Decimal16/Encoding# | + | | [[Cores/Decimal16/Encoding#flowArgs|Decimal16]] || F1 F2 F3 || 0 |
|} | |} | ||
| + | |||
| + | |||
| + | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | ||
Revision as of 02:36, 16 December 2014
four-byte constant continuation, conditional predicate, or other ganged argument
flowArgs(ops args)
operands: like Inv :
encoding:
flowArgs(op arg)
encoding:
flowArgs(off arg)
,
flowArgs(off arg, lit arg)
,
flowArgs(off arg, lit arg, lit arg)
,
flowArgs(off arg, lit arg, lit arg, lit arg)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F1 | 0 |
| Copper | F1 | 0 |
| Silver | F1 F2 F3 | 0 |
| Gold | F1 F2 F3 F4 F5 F6 F7 | 0 |
| Decimal8 | F1 F2 F3 | 0 |
| Decimal16 | F1 F2 F3 | 0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
