Difference between revisions of "Instruction Set/mulsw"
From Mill Computing Wiki
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---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">mulsw</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#s|s]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">mulsw</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) → [[Domains#s|s]] r<sub>0</sub></code> | ||
− | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands# | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidening|like Widening xx:2x]] |
</div> | </div> | ||
<br /> | <br /> | ||
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
|- | |- | ||
− | | [[Cores/Tin/Encoding#mulsw|Tin]] || E0 || | + | | [[Cores/Tin/Encoding#mulsw|Tin]] || E0 || |
|- | |- | ||
− | | [[Cores/Copper/Encoding#mulsw|Copper]] || E0 || | + | | [[Cores/Copper/Encoding#mulsw|Copper]] || E0 || |
|- | |- | ||
− | | [[Cores/Silver/Encoding#mulsw|Silver]] || E0 E1 || | + | | [[Cores/Silver/Encoding#mulsw|Silver]] || E0 E1 || |
|- | |- | ||
− | | [[Cores/Gold/Encoding#mulsw|Gold]] || E0 | + | | [[Cores/Gold/Encoding#mulsw|Gold]] || E0 || |
+ | |} | ||
+ | |||
+ | ---- | ||
+ | <code style="font-size:130%"><b style="color:#050">mulsw</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">op0</span>, <i><span style="color:#009">[[Immediates#imm|imm]]</span> <span title="small immediate constant of per-slot varying range">imm0</span></i>) → [[Domains#s|s]] r<sub>0</sub></code> | ||
+ | <div style="font-size:80%;line-height:90%;margin-bottom:2em">'''operands:''' [[Operands#likeWidening|like Widening xx:2x]] | ||
+ | </div> | ||
+ | <br /> | ||
+ | |||
+ | {| class="mw-collapsible mw-collapsed wikitable" data-expandtext="▸" data-collapsetext="▾" | ||
+ | ! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]] | ||
+ | |- | ||
+ | | [[Cores/Tin/Encoding#mulsw|Tin]] || E0 || | ||
+ | |- | ||
+ | | [[Cores/Copper/Encoding#mulsw|Copper]] || E0 || | ||
|- | |- | ||
− | | [[Cores/ | + | | [[Cores/Silver/Encoding#mulsw|Silver]] || E0 E1 || |
|- | |- | ||
− | | [[Cores/ | + | | [[Cores/Gold/Encoding#mulsw|Gold]] || E0 || |
|} | |} | ||
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] | [[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable] |
Latest revision as of 14:04, 23 February 2021
speculable exu stream exu block compute phase operation in the signed integer value domain using widening overflow behavior that produces condition codes
native on: all
Signed Integer multiply. Widening.
operands: like Widening xx:2x
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | |
Copper | E0 | |
Silver | E0 E1 | |
Gold | E0 |
operands: like Widening xx:2x
Core | In Slots | Latencies |
---|---|---|
Tin | E0 | |
Copper | E0 | |
Silver | E0 E1 | |
Gold | E0 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable