Difference between revisions of "Instruction Set/lea"
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There are several different addressing modes. The general formula for computing addresses is | There are several different addressing modes. The general formula for computing addresses is | ||
<code>base+offset+(scale*index)</code>.<br /> | <code>base+offset+(scale*index)</code>.<br /> | ||
− | Base can come from a number of special [[ | + | Base can come from a number of special [[Registers]] or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.<br /> |
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt. | Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt. | ||
Revision as of 17:49, 4 February 2015
Load Effective Address.
Allows you to do address arithmetic the same way the load and store operations, and to some degree the call and inner operation, do.
Produces pointers that in turn can then be used as base pointers for loads, stores and calls.
There are several different addressing modes. The general formula for computing addresses is
base+offset+(scale*index)
.
Base can come from a number of special Registers or the belt. Offset is always an inline constant. Those two are always present, although a zero offset doesn't take any space at all.
Scale and index are optional and alway appear together. The scale is a compile time constant, the index is always from the belt.
related operations: load, store, loadf, loadd, call, inner
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 2 |
Copper | F0 F1 | 2 |
Silver | F0 F1 F2 F3 | 2 |
Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 2 |
Decimal8 | F0 F1 F2 F3 | 2 |
Decimal16 | F0 F1 F2 F3 | 2 |
lea(base b, off o, u i, scale s)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 2 |
Copper | F0 F1 | 2 |
Silver | F0 F1 F2 F3 | 2 |
Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 2 |
Decimal8 | F0 F1 F2 F3 | 2 |
Decimal16 | F0 F1 F2 F3 | 2 |
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 2 |
Copper | F0 F1 | 2 |
Silver | F0 F1 F2 F3 | 2 |
Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 2 |
Decimal8 | F0 F1 F2 F3 | 2 |
Decimal16 | F0 F1 F2 F3 | 2 |
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 2 |
Copper | F0 F1 | 2 |
Silver | F0 F1 F2 F3 | 2 |
Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 2 |
Decimal8 | F0 F1 F2 F3 | 2 |
Decimal16 | F0 F1 F2 F3 | 2 |
lea(lbl l)
Core | In Slots | Latencies |
---|---|---|
Tin | F0 | 2 |
Copper | F0 F1 | 2 |
Silver | F0 F1 F2 F3 | 2 |
Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 2 |
Decimal8 | F0 F1 F2 F3 | 2 |
Decimal16 | F0 F1 F2 F3 | 2 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable