Difference between revisions of "Instruction Set/subux"

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{{DISPLAYTITLE:subux}}
 
{{DISPLAYTITLE:subux}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp; [[Overflow|using excepting overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
+
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the unsigned integer value domain]]&nbsp;&nbsp; [[Overflow|using excepting overflow behavior]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]]<br />
 
'''aliases:''' subuxv <br />
 
'''aliases:''' subuxv <br />
 
'''native on:''' [[Cores|all]]<br />
 
'''native on:''' [[Cores|all]]<br />

Revision as of 09:32, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the unsigned integer value domain   using excepting overflow behavior   that produces condition codes

aliases: subuxv
native on: all

Excepting unsigned integer subtraction. Overflow produces a NaR.


subux(u x, u y) → u r0

operands: like Identity [xx:x]


Core In Slots Latencies
Tin E0 2
Copper E0 E1 2
Silver E0 E1 E2 E3 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2
Decimal8 E0 E1 E2 E3 2
Decimal16 E0 E1 E2 E3 2

subux(u x, imm y) → u r0

operands: like Identity [xx:x]


Core In Slots Latencies
Tin E0 2
Copper E0 E1 2
Silver E0 E1 E2 E3 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2
Decimal8 E0 E1 E2 E3 2
Decimal16 E0 E1 E2 E3 2


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable