Difference between revisions of "Instruction Set/conform"

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(Created page with "{{DISPLAYTITLE:conform}} <div style="font-size:80%;line-height:90%;margin-bottom:2em">realizing  flow stream Decode|flow bl...")
 
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! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
! [[Cores|Core]] || [[Slot|In Slots]]|| [[Latency|Latencies]]
 
|-
 
|-
| [[Cores/Tin/Encoding#957|Tin]] || F0 || 1
+
| [[Cores/Tin/Encoding#conform|Tin]] || F0 || 1
 
|-
 
|-
| [[Cores/Copper/Encoding#957|Copper]] || F0 F1 || 1
+
| [[Cores/Copper/Encoding#conform|Copper]] || F0 F1 || 1
 
|-
 
|-
| [[Cores/Silver/Encoding#957|Silver]] || F0 F1 F2 || 1
+
| [[Cores/Silver/Encoding#conform|Silver]] || F0 F1 F2 || 1
 
|-
 
|-
| [[Cores/Gold/Encoding#957|Gold]] || F0 F1 F2 F3 || 1
+
| [[Cores/Gold/Encoding#conform|Gold]] || F0 F1 F2 F3 || 1
 
|-
 
|-
| [[Cores/Decimal8/Encoding#957|Decimal8]] || F0 F1 F2 || 1
+
| [[Cores/Decimal8/Encoding#conform|Decimal8]] || F0 F1 F2 || 1
 
|-
 
|-
| [[Cores/Decimal16/Encoding#957|Decimal16]] || F0 F1 F2 || 1
+
| [[Cores/Decimal16/Encoding#conform|Decimal16]] || F0 F1 F2 || 1
 
|}
 
|}
 +
 +
 +
[[Instruction_Set|Instruction Set, alphabetical]], [[Instruction Set by Category]], [http://millcomputing.com/instructions.html?collapse=7#ops Instruction Set, sortable, filterable]

Revision as of 02:36, 16 December 2014

realizing  flow stream  flow block  conform phase   operation  

native on: all

normalize belt contents to argument list


conform(ops args) → ops r0 ...

operands: like Inv :


encoding: conform(off ops, count c) , conform(off ops, count c, lit ops) , conform(off ops, count c, lit ops, lit ops) , conform(off ops, count c, lit ops, lit ops, lit ops)

Core In Slots Latencies
Tin F0 1
Copper F0 F1 1
Silver F0 F1 F2 1
Gold F0 F1 F2 F3 1
Decimal8 F0 F1 F2 1
Decimal16 F0 F1 F2 1


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable