Difference between revisions of "Instruction Set/addf"

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m (Protected "Instruction Set/addf": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite)))
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{{DISPLAYTITLE:addf}}
 
{{DISPLAYTITLE:addf}}
<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br />
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<div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|speculable]]&nbsp;&nbsp;[[Encoding|exu stream]]&nbsp;&nbsp;[[Decode|exu block]]&nbsp;&nbsp;[[Phasing|compute phase]]&nbsp;&nbsp; operation&nbsp;&nbsp; [[Domains|in the binary floating point value domain]]&nbsp;&nbsp; [[Condition Code|that produces condition codes]] [[Rounding|and rounds use current dynamic rounding mode]]<br />
 
'''native on:''' [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] <br />
 
'''native on:''' [[Cores/Silver|Silver]] [[Cores/Gold|Gold]] <br />
 
</div>
 
</div>

Revision as of 09:30, 9 February 2015

speculable  exu stream  exu block  compute phase   operation   in the binary floating point value domain   that produces condition codes and rounds use current dynamic rounding mode

native on: Silver Gold

Floating point add in current rounding mode.


addf(f x, f y) → f r0

operands: like Addf [ff:f]


Core In Slots Latencies
Silver E0 E1 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5
Gold E0 E1 E2 E3 w,w:w=3 wv,wv:wv=3 d,d:d=4 dv,dv:dv=4 q,q:q=5 qv,qv:qv=5


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable