Difference between revisions of "Instruction Set/subss"

From Mill Computing Wiki
Jump to: navigation, search
m (Protected "Instruction Set/subss": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite)))
Line 5:Line 5:
 
</div>
 
</div>
  
subtraction
+
Saturating signed integer subtraction.
 +
When a result value overflows or underflows for the width, it flats out at the biggest or smallest value respectively.
 +
 
 
----
 
----
 
<code style="font-size:130%"><b style="color:#050">subss</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code>
 
<code style="font-size:130%"><b style="color:#050">subss</b>(<span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">x</span>, <span style="color:#009">[[Domains#s|s]]</span> <span title="belt operand from ops window">y</span>) &#8594; [[Domains#s|s]] r<sub>0</sub></code>

Revision as of 10:33, 11 January 2015

realizing  exu stream  exu block  compute phase   operation   in the signed integer value domain   using saturating overflow behavior   that produces condition codes

aliases: subssv
native on: all

Saturating signed integer subtraction. When a result value overflows or underflows for the width, it flats out at the biggest or smallest value respectively.


subss(s x, s y) → s r0

operands: like Identity [xx:x]


Core In Slots Latencies
Tin E0 2
Copper E0 E1 2
Silver E0 E1 E2 E3 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2
Decimal8 E0 E1 E2 E3 2
Decimal16 E0 E1 E2 E3 2

subss(s x, imm y) → s r0

operands: like Identity [xx:x]


Core In Slots Latencies
Tin E0 2
Copper E0 E1 2
Silver E0 E1 E2 E3 2
Gold E0 E1 E2 E3 E4 E5 E6 E7 2
Decimal8 E0 E1 E2 E3 2
Decimal16 E0 E1 E2 E3 2


Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable