Difference between revisions of "Cores"
From Mill Computing Wiki
m (Protected "Cores": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |||
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{| class="wikitable" | {| class="wikitable" | ||
− | ! !! Belt!! Scalar!! Vector!! Pipelines!! Retire Stations!! Scratchpad!! Spiller Buffers/Stack!! | + | ! !! Belt!! Scalar!! Vector!! Pipelines!! Retire Stations!! Scratchpad!! Spiller Buffers/Stack!! Exu-side Cache Line!! Flow-side Cache Line!! float!! decimal |
|- | |- | ||
|<b>[[Cores/Tin|Tin]]</b> | |<b>[[Cores/Tin|Tin]]</b> | ||
− | | | + | |✔|8 |
− | | | + | |✔|64bit |
− | | | + | |✔|8B |
− | | | + | |✔|19 |
− | | | + | |✔|8 |
− | | | + | |✔|4096B |
− | | | + | |✔|8/16MB |
+ | |✔|16B | ||
|style="text-align:right"|16B | |style="text-align:right"|16B | ||
− | |style="text-align: | + | |style="text-align:right"|✔ |
− | + | ||
|- | |- | ||
|slots | |slots | ||
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|- | |- | ||
|<b>[[Cores/Copper|Copper]]</b> | |<b>[[Cores/Copper|Copper]]</b> | ||
− | | | + | |✔|8 |
− | | | + | |✔|64bit |
− | | | + | |✔|8B |
− | | | + | |✔|19 |
− | | | + | |✔|8 |
− | | | + | |✔|8192B |
− | | | + | |✔|8/16MB |
+ | |✔|16B | ||
|style="text-align:right"|16B | |style="text-align:right"|16B | ||
− | |style="text-align: | + | |style="text-align:right"|✔ |
− | + | ||
|- | |- | ||
|slots | |slots | ||
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|- | |- | ||
|<b>[[Cores/Silver|Silver]]</b> | |<b>[[Cores/Silver|Silver]]</b> | ||
− | | | + | |✔|16 |
− | | | + | |✔|64bit |
− | | | + | |✔|16B |
− | | | + | |✔|34 |
− | | | + | |✔|16 |
− | | | + | |✔|8192B |
− | | | + | |✔|16/256MB |
+ | |✔|64B | ||
|style="text-align:right"|32B | |style="text-align:right"|32B | ||
− | |style="text-align: | + | |style="text-align:right"|✔ |
− | + | ||
|- | |- | ||
|slots | |slots | ||
− | |colspan="10"| reader: | + | |colspan="10"| reader: 4 writer: 5 pick: 2 exu: 4 flow: 4 |
|- | |- | ||
|<b>[[Cores/Gold|Gold]]</b> | |<b>[[Cores/Gold|Gold]]</b> | ||
− | | | + | |✔|32 |
− | | | + | |✔|128bit |
− | + | |✔|16B | |
− | + | |✔|19 | |
− | + | |✔|16 | |
− | + | |✔|16384B | |
− | + | |✔|16/256MB | |
− | + | |✔|32B | |
− | + | ||
− | + | ||
− | | | + | |
− | | | + | |
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|style="text-align:right"|16B | |style="text-align:right"|16B | ||
− | |style="text-align:right | + | |style="text-align:right"|✔ |
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
|slots | |slots | ||
− | |colspan="10"| reader: | + | |colspan="10"| reader: 2 writer: 2 pick: 1 exu: 2 flow: 2 |
|} | |} |
Latest revision as of 13:24, 23 February 2021
The Mill Architecture describes a family of processor cores so that each family member can serve its own unique set of requirements and work loads. For the time being all defined Mill cores are purely simulated and cover a pretty generalistic range of profiles.
The difference between Tin and Copper may not be apparent from this table, but the second exu and flow Slots on Tin are reduced to an absolute minimum and don't even contain any ALU or branch Functional Units respectively.
Belt | Scalar | Vector | Pipelines | Retire Stations | Scratchpad | Spiller Buffers/Stack | Exu-side Cache Line | Flow-side Cache Line | float | decimal | |
---|---|---|---|---|---|---|---|---|---|---|---|
Tin | 8 | 64bit | 8B | 19 | 8 | 4096B | 8/16MB | 16B | 16B | ✔ | |
slots | reader: 2 writer: 2 pick: 1 exu: 2 flow: 2 | ||||||||||
Copper | 8 | 64bit | 8B | 19 | 8 | 8192B | 8/16MB | 16B | 16B | ✔ | |
slots | reader: 2 writer: 2 pick: 1 exu: 2 flow: 2 | ||||||||||
Silver | 16 | 64bit | 16B | 34 | 16 | 8192B | 16/256MB | 64B | 32B | ✔ | |
slots | reader: 4 writer: 5 pick: 2 exu: 4 flow: 4 | ||||||||||
Gold | 32 | 128bit | 16B | 19 | 16 | 16384B | 16/256MB | 32B | 16B | ✔ | |
slots | reader: 2 writer: 2 pick: 1 exu: 2 flow: 2 |