Difference between revisions of "Instruction Set/f2sefn"
From Mill Computing Wiki
m (Protected "Instruction Set/f2sefn": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |
(No difference) | |
Revision as of 01:34, 3 January 2015
realizing exu stream exu block compute phase operation in the binary floating point value domain using modulo overflow behavior that produces condition codes and rounds toward negative infinity
Exactly convert a binary floating point value to a signed integer, rounding toward nearest and normal modulo overflow.
operands: like Addf [ff:f]
| Core | In Slots | Latencies |
|---|---|---|
| Silver | E0 E1 | w:w=3 wv:wv=3 d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
| Gold | E0 E1 E2 E3 | w:w=3 wv:wv=3 d:d=4 dv:dv=4 q:q=5 qv:qv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
