Difference between revisions of "Instruction Set/mulsw"
From Mill Computing Wiki
m (Protected "Instruction Set/mulsw": generated ([Edit=<protect-level-bot>] (indefinite) [Move=<protect-level-bot>] (indefinite))) | |
(No difference) | |
Revision as of 01:32, 3 January 2015
realizing exu stream exu block compute phase operation in the signed integer value domain using widening overflow behavior that produces condition codes
native on: all
Signed Integer multiply. Widening.
operands: like Widen xx:2x
| Core | In Slots | Latencies |
|---|---|---|
| Tin | E0 | b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6 |
| Copper | E0 | b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6 |
| Silver | E0 E1 | b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6 |
| Gold | E0 E1 E2 E3 | b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6 |
| Decimal8 | E0 E1 | b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6 |
| Decimal16 | E0 E1 | b,b:h=3 h,h:w=4 w,w:d=5 d,d:q=6 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
