Difference between revisions of "Glossary"
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<div style="font-size: 10pt; font-weight: bold;" id="a">a</div> | <div style="font-size: 10pt; font-weight: bold;" id="a">a</div> | ||
| − | [[Abstract Assembly|Abstract Code]] | + | [[Abstract Assembly|Abstract Code]] - general data flow code for the Mill architecture, distribution format<br /> |
| − | [[Abstract Assembly|Abstract Assembly]] | + | [[Abstract Assembly|Abstract Assembly]] - general data flow code for the Mill architecture in human readable form, mainly used as compiler output<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="b">b</div> | <div style="font-size: 10pt; font-weight: bold;" id="b">b</div> | ||
| − | [[Belt]] | + | [[Belt]] - provides the functionality of general purpose registers<br /> |
| − | [[Belt#Belt_Position_Data_Format|Belt Position/Belt Location]] | + | [[Belt#Belt_Position_Data_Format|Belt Position/Belt Location]] - the read only data source for machine operations<br /> |
| − | [[Encoding#Instructions_and_Operations_and_Bundles|Bundle]] | + | [[Encoding#Instructions_and_Operations_and_Bundles|Bundle]] - a collection of instructions that get fetched from memory together<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="c">c</div> | <div style="font-size: 10pt; font-weight: bold;" id="c">c</div> | ||
| − | [[Concrete Assembly|Concrete Code]] | + | [[Concrete Assembly|Concrete Code]] - specialized executable code for a specific Mill processor<br /> |
| − | [[Concrete Assembly|Concrete Assembly]] | + | [[Concrete Assembly|Concrete Assembly]] - specialized executable code for a specific Mill processor in human readable form, mainly used for testing and in the debugger<br /> |
| + | [[Crossbar]] - the interconnecting framework that routes the data sources to the functional units<br /> | ||
<div style="font-size: 10pt; font-weight: bold;" id="d">d</div> | <div style="font-size: 10pt; font-weight: bold;" id="d">d</div> | ||
| − | [[Decode]] | + | [[Decode]] - turning instruciton stream bit patters into requests to functional units<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="e">e</div> | <div style="font-size: 10pt; font-weight: bold;" id="e">e</div> | ||
[[Encoding#Extended_Basic_Block|EBB]] - extended basic block, a batch or sequence of instructions with one entry point and one or more exit points<br /> | [[Encoding#Extended_Basic_Block|EBB]] - extended basic block, a batch or sequence of instructions with one entry point and one or more exit points<br /> | ||
[[Encoding]] – the semantic bit patterns representing operations<br /> | [[Encoding]] – the semantic bit patterns representing operations<br /> | ||
| − | [[Prediction#Exit_Table|Exit]] | + | [[Prediction#Exit_Table|Exit]] - a point where the instruction stream can leave the EBB<br /> |
[[Prediction#Exit_Table|Exit Table]] - a hardware hash table containing exit point usage for EBBs, used to predict control flow<br /> | [[Prediction#Exit_Table|Exit Table]] - a hardware hash table containing exit point usage for EBBs, used to predict control flow<br /> | ||
[[ExuCore]] - the collection of functional units and facilities serving operations from the exu instruction stream<br /> | [[ExuCore]] - the collection of functional units and facilities serving operations from the exu instruction stream<br /> | ||
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<div style="font-size: 10pt; font-weight: bold;" id="f">f</div> | <div style="font-size: 10pt; font-weight: bold;" id="f">f</div> | ||
[[FlowCore]] - the collection of functional units and facilities serving operations from the flow instruction stream<br /> | [[FlowCore]] - the collection of functional units and facilities serving operations from the flow instruction stream<br /> | ||
| − | [[Functional Unit]] - the hardware module that provides the functionality to perform an operation<br /> | + | [[Functional Unit|FU, Functional Unit]] - the hardware module that provides the functionality to perform an operation<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="g">g</div> | <div style="font-size: 10pt; font-weight: bold;" id="g">g</div> | ||
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<div style="font-size: 10pt; font-weight: bold;" id="i">i</div> | <div style="font-size: 10pt; font-weight: bold;" id="i">i</div> | ||
[[Memory#Implicit_Zero_and_Virtual_Zero|Implicit Zero]] - loads from new stack frames are implicitly zero<br /> | [[Memory#Implicit_Zero_and_Virtual_Zero|Implicit Zero]] - loads from new stack frames are implicitly zero<br /> | ||
| − | [[Encoding#Instructions_and_Operations_and_Bundles|Instruction]] | + | [[Encoding#Instructions_and_Operations_and_Bundles|Instruction]] - a collection of operations that get executed together<br /> |
| − | [[Encoding#Split_Instruction_Streams|Instruction Stream]] | + | [[Encoding#Split_Instruction_Streams|Instruction Stream]] - a sequence of instructions, the Mill has 2 working in parallel<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="j">j</div> | <div style="font-size: 10pt; font-weight: bold;" id="j">j</div> | ||
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<div style="font-size: 10pt; font-weight: bold;" id="m">m</div> | <div style="font-size: 10pt; font-weight: bold;" id="m">m</div> | ||
| − | [[Metadata]] | + | [[Metadata]] - tags attached to belt slots that describe the data in it<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="n">n</div> | <div style="font-size: 10pt; font-weight: bold;" id="n">n</div> | ||
| − | [[Metadata#None_and_NaR|None]] | + | [[Metadata#None_and_NaR|None]] - undefined data in a slot that is silently ignored by operations<br /> |
| − | [[Metadata#None_and_NaR|NaR]] | + | [[Metadata#None_and_NaR|NaR]] - Not a Result, undefined data that traps when used in certain operations<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="o">o</div> | <div style="font-size: 10pt; font-weight: bold;" id="o">o</div> | ||
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[[Phasing|Phase, Phasing]] - sequenced execution of different operations within one instruction<br /> | [[Phasing|Phase, Phasing]] - sequenced execution of different operations within one instruction<br /> | ||
[[Protection#Protection_Lookaside_Buffer|PLB]] - on chip cache for looking up protection regions for a virtual address<br /> | [[Protection#Protection_Lookaside_Buffer|PLB]] - on chip cache for looking up protection regions for a virtual address<br /> | ||
| + | [[Slot|Pipeline]] - a logical and physical grouping of functional units sharing infrastructure for sequential step by step proceesing each cycle, emphasis on the physical aspect<br /> | ||
[[Pipelining]] - arrangeing operations in the instruction stream in such a way as to maximize functional unit utilization<br /> | [[Pipelining]] - arrangeing operations in the instruction stream in such a way as to maximize functional unit utilization<br /> | ||
[[Protection#Portals|Portal]] - a gateway between different protection domains or turfs a thread can pass through<br /> | [[Protection#Portals|Portal]] - a gateway between different protection domains or turfs a thread can pass through<br /> | ||
[[Prediction]] - deciding which branch to take in advance to prefetch the right code<br /> | [[Prediction]] - deciding which branch to take in advance to prefetch the right code<br /> | ||
| − | [[Protection#Protection_Lookaside_Buffer|PLB]] | + | [[Protection#Protection_Lookaside_Buffer|PLB]] - Protection Lookaside Buffer<br /> |
| − | [[Protection#Portals|Portal]] | + | [[Protection#Portals|Portal]] - a cross turf call destination<br /> |
| − | [[Protection#Regions_and_Turfs|Protection Region]] | + | [[Protection#Regions_and_Turfs|Protection Region]] - specified continuous memory region with attached permissions<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="q">q</div> | <div style="font-size: 10pt; font-weight: bold;" id="q">q</div> | ||
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<div style="font-size: 10pt; font-weight: bold;" id="s">s</div> | <div style="font-size: 10pt; font-weight: bold;" id="s">s</div> | ||
| − | [[Scratchpad]] | + | [[Scratchpad]] - Temporary buffer for operands from the belt<br /> |
| − | [[Virtual Address#Single_Address_Space|SAS]] | + | [[Virtual Address#Single_Address_Space|SAS]] - Single Address Space<br /> |
| − | [[Protection#Services|Service]] | + | [[Protection#Services|Service]] - a stateful call interface that can cross protection barriers<br /> |
| − | [[Slot]] - a | + | [[Slot]] - a logical and physical grouping of functional units sharing infrastructure for sequential step by step proceesing each cycle, emphasis on the logical aspect<br /> |
| − | [[Specializer]] | + | [[Specializer]] - turns general/abstract Mill code into concrete hardware specific machine instructions<br /> |
| − | [[Speculation]] | + | [[Speculation]] - computing several paths in branches in parallel only to later throw away the unneeded results<br /> |
| − | [[Spiller]] | + | [[Spiller]] - securely manages temporary memory used by certain operations in hardware<br /> |
| − | [[Protection#Stacklets|Stacklet]] | + | [[Protection#Stacklets|Stacklet]] - hardware managed memory line used in fragmented stacks<br /> |
| − | [[Protection#Stacklet_Info_Block|Stacklet Info Block]] | + | [[Protection#Stacklet_Info_Block|Stacklet Info Block]] - preserves stacklet state for a thread across portal calls<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="t">t</div> | <div style="font-size: 10pt; font-weight: bold;" id="t">t</div> | ||
[[Protection#Threads|Thread]] - a contained and IDd flow of execution<br /> | [[Protection#Threads|Thread]] - a contained and IDd flow of execution<br /> | ||
| − | [[Memory#Address_Translation|TLB]] | + | [[Memory#Address_Translation|TLB]] - Translation Lookaside Buffer<br /> |
| − | [[Protection#Regions_and_Turfs|Turf]] | + | [[Protection#Regions_and_Turfs|Turf]] - memory protection domain on the Mill, a collection of regions<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="u">u</div> | <div style="font-size: 10pt; font-weight: bold;" id="u">u</div> | ||
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<div style="font-size: 10pt; font-weight: bold;" id="w">w</div> | <div style="font-size: 10pt; font-weight: bold;" id="w">w</div> | ||
| − | [[Protection#Well_Known_Regions|WKR, Well Known Region]] | + | [[Protection#Well_Known_Regions|WKR, Well Known Region]] - protection regions not defined in the PLB but in registers, automatically managed by hardware<br /> |
<div style="font-size: 10pt; font-weight: bold;" id="x">x</div> | <div style="font-size: 10pt; font-weight: bold;" id="x">x</div> | ||
<div style="font-size: 10pt; font-weight: bold;" id="y">y</div> | <div style="font-size: 10pt; font-weight: bold;" id="y">y</div> | ||
<div style="font-size: 10pt; font-weight: bold;" id="z">z</div> | <div style="font-size: 10pt; font-weight: bold;" id="z">z</div> | ||
Revision as of 11:32, 12 August 2014
0 a b c d e f g h i j k l m n o p q r s t u v w x y z
Abstract Code - general data flow code for the Mill architecture, distribution format
Abstract Assembly - general data flow code for the Mill architecture in human readable form, mainly used as compiler output
Belt - provides the functionality of general purpose registers
Belt Position/Belt Location - the read only data source for machine operations
Bundle - a collection of instructions that get fetched from memory together
Concrete Code - specialized executable code for a specific Mill processor
Concrete Assembly - specialized executable code for a specific Mill processor in human readable form, mainly used for testing and in the debugger
Crossbar - the interconnecting framework that routes the data sources to the functional units
Decode - turning instruciton stream bit patters into requests to functional units
EBB - extended basic block, a batch or sequence of instructions with one entry point and one or more exit points
Encoding – the semantic bit patterns representing operations
Exit - a point where the instruction stream can leave the EBB
Exit Table - a hardware hash table containing exit point usage for EBBs, used to predict control flow
ExuCore - the collection of functional units and facilities serving operations from the exu instruction stream
FlowCore - the collection of functional units and facilities serving operations from the flow instruction stream
FU, Functional Unit - the hardware module that provides the functionality to perform an operation
Ganging - combining more than two belt operands in more than one slot to perform a more complex operation
Implicit Zero - loads from new stack frames are implicitly zero
Instruction - a collection of operations that get executed together
Instruction Stream - a sequence of instructions, the Mill has 2 working in parallel
Metadata - tags attached to belt slots that describe the data in it
None - undefined data in a slot that is silently ignored by operations
NaR - Not a Result, undefined data that traps when used in certain operations
Operation – the most basic semantically defined hardware unit of execution
Phase, Phasing - sequenced execution of different operations within one instruction
PLB - on chip cache for looking up protection regions for a virtual address
Pipeline - a logical and physical grouping of functional units sharing infrastructure for sequential step by step proceesing each cycle, emphasis on the physical aspect
Pipelining - arrangeing operations in the instruction stream in such a way as to maximize functional unit utilization
Portal - a gateway between different protection domains or turfs a thread can pass through
Prediction - deciding which branch to take in advance to prefetch the right code
PLB - Protection Lookaside Buffer
Portal - a cross turf call destination
Protection Region - specified continuous memory region with attached permissions
Replay - the way the hardware restores machine state after being interrupted
Region Table - the memory backing for the PLB
Scratchpad - Temporary buffer for operands from the belt
SAS - Single Address Space
Service - a stateful call interface that can cross protection barriers
Slot - a logical and physical grouping of functional units sharing infrastructure for sequential step by step proceesing each cycle, emphasis on the logical aspect
Specializer - turns general/abstract Mill code into concrete hardware specific machine instructions
Speculation - computing several paths in branches in parallel only to later throw away the unneeded results
Spiller - securely manages temporary memory used by certain operations in hardware
Stacklet - hardware managed memory line used in fragmented stacks
Stacklet Info Block - preserves stacklet state for a thread across portal calls
Thread - a contained and IDd flow of execution
TLB - Translation Lookaside Buffer
Turf - memory protection domain on the Mill, a collection of regions
Virtual Zero - loads from all uninitialized memory yield zero
WKR, Well Known Region - protection regions not defined in the PLB but in registers, automatically managed by hardware
