Difference between revisions of "Instruction Set/narrowdz"
From Mill Computing Wiki
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{{DISPLAYTITLE:narrowdz}} | {{DISPLAYTITLE:narrowdz}} | ||
| − | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the decimal floating point value domain]] <br /> | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the decimal floating point value domain]] [[Rounding|and rounds toward zero]]<br /> |
'''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br /> | '''native on:''' [[Cores/Decimal8|Decimal8]] [[Cores/Decimal16|Decimal16]] <br /> | ||
</div> | </div> | ||
Revision as of 18:53, 20 December 2014
realizing exu stream exu block compute phase operation in the decimal floating point value domain and rounds toward zero
narrow scalar to half width
operands: like Narrowd [dd:½d]
| Core | In Slots | Latencies |
|---|---|---|
| Decimal8 | E0 E1 | d:w=4 q:d=5 |
| Decimal16 | E0 E1 | d:w=4 q:d=5 |
operands: like Narrowvd [DD:½D]
| Core | In Slots | Latencies |
|---|---|---|
| Decimal8 | E0 E1 | dv,dv:wv=4 qv,qv:dv=5 |
| Decimal16 | E0 E1 | dv,dv:wv=4 qv,qv:dv=5 |
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
