Difference between revisions of "Glossary"

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<div style="font-size: 10pt; font-weight: bold;" id="a">a</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="a">a</div>
 +
[[Abstract Assembly|Abstract Code]] – general data flow code for the Mill architecture, distribution format<br />
 +
[[Abstract Assembly|Abstract Assembly]] – general data flow code for the Mill architecture in human readable form, mainly used as compiler output<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="b">b</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="b">b</div>
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<div style="font-size: 10pt; font-weight: bold;" id="c">c</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="c">c</div>
 +
[[Concrete Assembly|Concrete Code]] – specialized executable code for a specific Mill processor<br />
 +
[[Concrete Assembly|Concrete Assembly]] – specialized executable code for a specific Mill processor in human readable form, mainly used for testing and in the debugger<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="d">d</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="d">d</div>
 +
[[Decode]] – turning instruciton stream bit patters into requests to functional units<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="e">e</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="e">e</div>
[[Encoding#EBB|EBB]] – Extended Basic Block<br />
+
[[Encoding#Extended_Basic_Block|EBB]] - extended basic block, a batch or sequence of instructions with one entry point and one or more exit points<br />
 +
[[Encoding]] – the semantic bit patterns representing operations<br />
 
[[Exit]] – a point where the instruction stream can leave the EBB<br />
 
[[Exit]] – a point where the instruction stream can leave the EBB<br />
 +
[[Prediction#Exit_Table|Exit Table]] - a hardware hash table containing exit point usage for EBBs, used to predict control flow<br />
 +
[[ExuCore]] - the collection of functional units and facilities serving operations from the exu instruction stream<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="f">f</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="f">f</div>
 +
[[FlowCore]] - the collection of functional units and facilities serving operations from the flow instruction stream<br />
 +
[[Functional Unit]] - the hardware module that provides the functionality to perform an operation<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="g">g</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="g">g</div>
 +
[[Ganging]] - combining more than two belt operands in more than one slot to perform a more complex operation<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="h">h</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="h">h</div>
  
 
<div style="font-size: 10pt; font-weight: bold;" id="i">i</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="i">i</div>
[[Memory#Implicit_Zero_and_Virtual_Zero|Implicit Zero]] - uninitialized memory loads are implicitly zero<br />
+
[[Memory#Implicit_Zero_and_Virtual_Zero|Implicit Zero]] - loads from new stack frames are implicitly zero<br />
 
[[Encoding#Instructions_and_Operations_and_Bundles|Instruction]] – a collection of operations that get executed together<br />
 
[[Encoding#Instructions_and_Operations_and_Bundles|Instruction]] – a collection of operations that get executed together<br />
 
[[Encoding#Split_Instruction_Streams|Instruction Stream]] – a sequence of instructions, the Mill has 2 working in parallel<br />
 
[[Encoding#Split_Instruction_Streams|Instruction Stream]] – a sequence of instructions, the Mill has 2 working in parallel<br />
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<div style="font-size: 10pt; font-weight: bold;" id="p">p</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="p">p</div>
[[Phasing|Phase]] - sequenced execution of different operations within one instruction<br />
+
[[Phasing|Phase, Phasing]] - sequenced execution of different operations within one instruction<br />
 +
[[Protection#Protection_Lookaside_Buffer|PLB]] - on chip cache for looking up protection regions for a virtual address<br />
 +
[[Pipelining]] - arrangeing operations in the instruction stream in such a way as to maximize functional unit utilization<br />
 +
[[Protection#Portals|Portal]] - a gateway between different protection domains or turfs a thread can pass through<br />
 
[[Protection#Protection_Lookaside_Buffer|PLB]] – Protection Lookaside Buffer<br />
 
[[Protection#Protection_Lookaside_Buffer|PLB]] – Protection Lookaside Buffer<br />
 
[[Protection#Portals|Portal]] – a cross turf call destination<br />
 
[[Protection#Portals|Portal]] – a cross turf call destination<br />
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<div style="font-size: 10pt; font-weight: bold;" id="r">r</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="r">r</div>
 
[[Replay]] - the way the hardware restores machine state after being interrupted<br />
 
[[Replay]] - the way the hardware restores machine state after being interrupted<br />
 +
[[Protection#Region_Table|Region Table]] - the memory backing for the PLB<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="s">s</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="s">s</div>
 
[[Scratchpad]] – Temporary buffer for operands from the belt<br />
 
[[Scratchpad]] – Temporary buffer for operands from the belt<br />
[[Virtual Address|SAS]] – Single Address Space<br />
+
[[Virtual Address#Single_Address_Space|SAS]] – Single Address Space<br />
 
[[Protection#Services|Service]] – a stateful call interface that can cross protection barriers<br />
 
[[Protection#Services|Service]] – a stateful call interface that can cross protection barriers<br />
[[Specializer]] – turns general mill assembly into hardware specific machine instructions<br />
+
[[Slot]] - a data path pipeline with two inputs providing one or more functional units to perform operations<br />
 +
[[Specializer]] – turns general/abstract Mill code into concrete hardware specific machine instructions<br />
 +
[[Speculation]] – computing several paths in branches in parallel only to later throw away the unneeded results<br />
 
[[Spiller]] – securely manages temporary memory used by certain operations in hardware<br />
 
[[Spiller]] – securely manages temporary memory used by certain operations in hardware<br />
 
[[Protection#Stacklets|Stacklet]] – hardware managed memory line used in fragmented stacks<br />
 
[[Protection#Stacklets|Stacklet]] – hardware managed memory line used in fragmented stacks<br />
 +
[[Protection#Stacklet_Info_Block|Stacklet Info Block]] – preserves stacklet state for a thread across portal calls<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="t">t</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="t">t</div>
[[Memory#Address_TranslationTLB]] – Translation Lookaside Buffer<br />
+
[[Protection#Threads|Thread]] - a contained and IDd flow of execution<br />
 +
[[Memory#Address_Translation|TLB]] – Translation Lookaside Buffer<br />
 
[[Protection#Regions_and_Turfs|Turf]] – memory protection domain on the Mill, a collection of regions<br />
 
[[Protection#Regions_and_Turfs|Turf]] – memory protection domain on the Mill, a collection of regions<br />
  
 
<div style="font-size: 10pt; font-weight: bold;" id="u">u</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="u">u</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="v">v</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="v">v</div>
 +
[[Memory#Implicit_Zero_and_Virtual_Zero|Virtual Zero]] - loads from all uninitialized memory yield zero<br />
 +
 
<div style="font-size: 10pt; font-weight: bold;" id="w">w</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="w">w</div>
 +
[[Protection#Well_Known_Regions|WKR, Well Known Region]] – protection regions not defined in the PLB but in registers, automatically managed by hardware<br />
 +
 
<div style="font-size: 10pt; font-weight: bold;" id="x">x</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="x">x</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="y">y</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="y">y</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="z">z</div>
 
<div style="font-size: 10pt; font-weight: bold;" id="z">z</div>

Revision as of 10:13, 3 August 2014

0 a b c d e f g h i j k l m n o p q r s t u v w x y z

0
a

Abstract Code – general data flow code for the Mill architecture, distribution format
Abstract Assembly – general data flow code for the Mill architecture in human readable form, mainly used as compiler output

b

Belt – provides the functionality of general purpose registers
Belt Position/Belt Location – the read only data source for machine operations
Bundle – a collection of instructions that get fetched from memory together

c

Concrete Code – specialized executable code for a specific Mill processor
Concrete Assembly – specialized executable code for a specific Mill processor in human readable form, mainly used for testing and in the debugger

d

Decode – turning instruciton stream bit patters into requests to functional units

e

EBB - extended basic block, a batch or sequence of instructions with one entry point and one or more exit points
Encoding – the semantic bit patterns representing operations
Exit – a point where the instruction stream can leave the EBB
Exit Table - a hardware hash table containing exit point usage for EBBs, used to predict control flow
ExuCore - the collection of functional units and facilities serving operations from the exu instruction stream

f

FlowCore - the collection of functional units and facilities serving operations from the flow instruction stream
Functional Unit - the hardware module that provides the functionality to perform an operation

g

Ganging - combining more than two belt operands in more than one slot to perform a more complex operation

h
i

Implicit Zero - loads from new stack frames are implicitly zero
Instruction – a collection of operations that get executed together
Instruction Stream – a sequence of instructions, the Mill has 2 working in parallel

j
k
l
m

Metadata – tags attached to belt slots that describe the data in it

n

None – undefined data in a slot that is silently ignored by operations
NaR – Not a Result, undefined data that traps when used in certain operations

o

Operation – the most basic semantically defined hardware unit of execution

p

Phase, Phasing - sequenced execution of different operations within one instruction
PLB - on chip cache for looking up protection regions for a virtual address
Pipelining - arrangeing operations in the instruction stream in such a way as to maximize functional unit utilization
Portal - a gateway between different protection domains or turfs a thread can pass through
PLB – Protection Lookaside Buffer
Portal – a cross turf call destination
Protection Region – specified continuous memory region with attached permissions

q
r

Replay - the way the hardware restores machine state after being interrupted
Region Table - the memory backing for the PLB

s

Scratchpad – Temporary buffer for operands from the belt
SAS – Single Address Space
Service – a stateful call interface that can cross protection barriers
Slot - a data path pipeline with two inputs providing one or more functional units to perform operations
Specializer – turns general/abstract Mill code into concrete hardware specific machine instructions
Speculation – computing several paths in branches in parallel only to later throw away the unneeded results
Spiller – securely manages temporary memory used by certain operations in hardware
Stacklet – hardware managed memory line used in fragmented stacks
Stacklet Info Block – preserves stacklet state for a thread across portal calls

t

Thread - a contained and IDd flow of execution
TLB – Translation Lookaside Buffer
Turf – memory protection domain on the Mill, a collection of regions

u
v

Virtual Zero - loads from all uninitialized memory yield zero

w

WKR, Well Known Region – protection regions not defined in the PLB but in registers, automatically managed by hardware

x
y
z