Difference between revisions of "Instruction Set/divfn"
From Mill Computing Wiki
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{{DISPLAYTITLE:divfn}} | {{DISPLAYTITLE:divfn}} | ||
| − | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the binary floating point value domain]] [[Condition Code|that produces condition codes]]<br /> | + | <div style="font-size:80%;line-height:90%;margin-bottom:2em">[[Speculation|realizing]] [[Encoding|exu stream]] [[Decode|exu block]] [[Phasing|compute phase]] operation [[Domains|in the binary floating point value domain]] [[Condition Code|that produces condition codes]] [[Rounding|and rounds toward negative infinity]]<br /> |
'''native on:''' [[Assembly|none]]<br /> | '''native on:''' [[Assembly|none]]<br /> | ||
</div> | </div> | ||
Revision as of 18:52, 20 December 2014
realizing exu stream exu block compute phase operation in the binary floating point value domain that produces condition codes and rounds toward negative infinity
native on: none
Floating point division in current rounding to nearest.
operands: like Addf [ff:f]
Instruction Set, alphabetical, Instruction Set by Category, Instruction Set, sortable, filterable
