Difference between revisions of "Instruction Set/con"
From Mill Computing Wiki
| Line 8: | Line 8: | ||
The con operation retires in the reader phase despite it using the extension and manifest encoding blocks for the value. This is possible because these bitpatterns are not interpreted at all but directly placed into the belt. Only scalar values are possible, and the width is determined from the head. | The con operation retires in the reader phase despite it using the extension and manifest encoding blocks for the value. This is possible because these bitpatterns are not interpreted at all but directly placed into the belt. Only scalar values are possible, and the width is determined from the head. | ||
| − | + | <b>related operations:</b> [[Instruction_Set/rd|rd]] | |
---- | ---- | ||
<code style="font-size:130%"><b style="color:#050">con</b>(<i><span style="color:#009">[[Immediates#constant|constant]]</span> <span title="manifest constant">v</span></i>) → [[Domains#op|op]] r<sub>0</sub></code> | <code style="font-size:130%"><b style="color:#050">con</b>(<i><span style="color:#009">[[Immediates#constant|constant]]</span> <span title="manifest constant">v</span></i>) → [[Domains#op|op]] r<sub>0</sub></code> | ||
Revision as of 19:59, 26 November 2014
Drop an immediate constant on the belt.
The con operation retires in the reader phase despite it using the extension and manifest encoding blocks for the value. This is possible because these bitpatterns are not interpreted at all but directly placed into the belt. Only scalar values are possible, and the width is determined from the head.
related operations: rd
operands: like IdentityNoSIMD xx:x
encoding:
con(off v, width w)
,
con(off v, width w, lit v)
,
con(off v, width w, lit v, lit v)
,
con(off v, width w, lit v, lit v, lit v)
| Core | In Slots | Latencies |
|---|---|---|
| Tin | F0 F1 | 0 |
| Copper | F0 F1 | 0 |
| Silver | F0 F1 F2 F3 | 0 |
| Gold | F0 F1 F2 F3 F4 F5 F6 F7 | 0 |
| Decimal8 | F0 F1 F2 F3 | 0 |
| Decimal16 | F0 F1 F2 F3 | 0 |
